izvorni znanstveni rad
Memory-aware multiobjective design space exploration of heteregeneous MPSoC
Sažetak
This paper discusses multiobjective exploration of heterogeneous MPSoC design space using a method based on NSGA-II evolutionary algorithm. Key feature of the proposed method is separation of computation and communication which enables exploration of mapping computation to processors and communication to memory elements. In this paper two approaches to mapping and scheduling are presented and compared: (1) single-phased, where tasks and communication channels are mapped to processor and memories simultaneously, and (2) two-phased, where mapping of tasks to processors is done in first phase, followed by mapping of communication channel to memories in the second phase.
Ključne riječi
genetic algorithms ; integrated circuit design ; microprocessor chips ; random-access storage ; system-on-chip ; communication channel ; memory-aware multiobjective design space exploration ; NSGA-II evolutionary algorithm ; heterogeneous MPSoC design ; Task analysis ; Program processors ; Resource management ; Communication channels ; Space exploration ; Processor scheduling ; Evolutionary computation ; design space exploration ; MPSoC ; evolutionary algorithm