Adaptive Virtual Devices Platform for Verification of FPGA Modules in Student Courses on Digital Design

izvorni znanstveni rad

izvorni znanstveni rad

Adaptive Virtual Devices Platform for Verification of FPGA Modules in Student Courses on Digital Design

Vlado Sruk
Vrsta prilog sa skupa (u zborniku)
Tip izvorni znanstveni rad
Godina 2013
Nadređena publikacija USB Proceedings 2013 7th IEEE International Conference on e-Learning in Industrial Electronics (ICELIE)
Stranice str. 22-27
Status objavljeno

Sažetak

This paper describes the FPGA based verification platform that is dedicated to improve student efficiency for the course on Digital Design with FPGAs. We developed a functional verification platform that extends the number of I/O devices, which is usually limited on development kits. Simple PicoBlaze CPU-based design is used to synchronize the input and output signals between PC and the FPGA. Complete verification platform occupies only 14% of the Spartan 3 XC3S200 FPGA device. During the course, students get the knowledge about the PicoBlaze CPU and it's assembly language, as well as getting familiar with the FPGAs and VHDL. At the end of the lectures, students are able to understand the HW/SW co-design and to use the verification platform for making their final project.

Ključne riječi

FPGA validation; FPGA verification; debugging HDL modules; HDL development process; PicoBlaze CPU

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