stručni rad
In many fields of research pattern search problems can be viewed as a string-matching problem for which many solutions were developed over the years with varying ease of implementation and characteristics of the pattern and the input text. In this work, the design of several string- matching algorithms for logic synthesis implementation is presented. Based on the abstraction of the algorithmic state machine (ASM), the design is converted to VHDL finite state machine and synthesized for FPGA logic. The final implementations are evaluated in performance and resource utilization metrics, and against pure software implementation for the same algorithms using higher-level language.
pattern search, FPGA implementation, algorithmic state machine, finite state machine
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The ever-growing usage and adaptation of HTTP/3 in web traffic leverages Quick UDP Internet Connections (QUIC) as a transport protocol. QUIC is widely recognized for reduced latency, enhanced…
