izvorni znanstveni rad
Embedded systems have become an integral part of High Performance Computing (HPC) due to their appealing energy and resource consumption characteristics. Required performance goals can be achieved only by deploying the application on a heterogeneous platform. The established approach of designing a custom made FPGA architecture platform targeting particular application is challenged by novel multiprocessor heterogeneous platforms built using existing of-the-shelf embedded CPUs. The challenge is to exploit all the available parallelism and heterogeneity to design a time and cost efficient, but also a reusable solution which will meet the performance goals. In this paper the heterogeneity of parallel SoC system is evaluated through different processor cores and memory configurations usage examination. The design space exploration undertaken relies on several hypotheses concerning design concepts relations. Since system operating frequency is crucial, but not the only design performance success parameter, the importance of operating processor data path is emphasized as it conducts the application mapping approach. We show that, depending on the different heterogeneous elements configurations used within some multicore SoC solution, the suitability of particular processor cores usage varies on application type, but with achieved performance comparable to application- specific custom generated hardware.
Embedded Computer Systems ; Heterogeneous Computing ; FPGA ; High Level Synthesis ; Design Space Exploration ; Software partitioning and mapping
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